Virtual Machine Showdown: Stack Versus Registers
Virtual machines (VMs) for high-level programming languages, such as the Java VM, enable the distribution of programs in an architecture-neutral format. Such VMs are typically implemented using an interpreter or a just-in-time compiler. A very long-running question in the design of VMs is whether a stack architecture or register architecture can be implemented more efficiently with an interpreter.
Zusammenfassung
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Was
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Virtual Machine Showdown: Stack Versus Registers
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Wer
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Dr. David GREGG, Trinity College Dublin, Ireland
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Wo
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TU Wien, Bibliothek E185.1, Argentinierstraße 8, 4. Stock
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Wann
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22/09/08
16:00
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Link
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https://www.cs.tcd.ie/David.Gregg/
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Details
Der Arbeitsbereich für Programmiersprachen und Übersetzer am Institut für Computersprachen lädt zum Vortrag ein:
Abstract
Virtual machines (VMs) for high-level programming languages, such as the Java VM, enable the distribution of programs in an architecture-neutral format. Such VMs are typically implemented using an interpreter or a just-in-time compiler. A very long-running question in the design of VMs is whether a stack architecture or register architecture can be implemented more efficiently with an interpreter. It is generally recognized that stack code is smaller, but must use additional VM instructions shuffle data onto and off of the stack. We built a register version of the JVM and found that it executes an average of 46% fewer VM instructions, although at the cost of a 26% increase in code size. Our virtual register VM runs on Intel, AMD 64, PowerPC, and Alpha processors, and supports a variety of interpreter optimizations. On the AMD64 architecture the register machine using switch dispatch achieves an average speedup of 1.48 over the corresponding stack machine. Even using the more efficient inline-threaded dispatch, the register VM achieves a speedup of 1.15 over the equivalent stack-based VM.
Kurzbiographie
David Gregg is a lecturer in Computer Science at Trinity College Dublin, Ireland. His research deals with compilers, program optimization and computer architecture, with a particular focus on the interaction of software and processor architecture. He currently leads a group of nine researchers working in the areas of compilers, virtual machines for high-level programming languages, and optimizations for multi-core architectures. He holds an MSc from University College Dublin, a doctorate from Technische Universität Wien, Austria, and in 2007 was elected a Fellow of Trinity College Dublin.
