TU Wien Informatics

20 Years

Infrastructure for Optimisation through Property Annotation and Aggregation

  • 2012-09-28
  • Research

Optimising software for efficiency on a parallel hardware platform by analysing the performance of the application is often a complex and time-consuming task.

Abstract

Optimising software for efficiency on a parallel hardware platform by analysing the performance of the application is often a complex and time-consuming task. This talk presents a constraint annotation and aggregation system that allows programmers to annotate code by using a dedicated language for describing functional and extra-functional properties, such as for example algorithmic complexity, scaling factors or the number of required cores. The goal is to derive properties of the entire application that are parametrised over characteristics of the execution platform to assist programmers in better understanding the behaviour of an application on the one hand and to assist the execution platform in making informed mapping and scheduling decisions on the other.

Biography

Dr. Raimund Kirner holds a position as Principal Lecturer at the University of Hertfordshire. He has published more than 80 refereed journal and conference papers and received two patents. R. Kirner received his PhD in 2003 from the TU Vienna and defended his Habilitation in 2010. The research focus of R. Kirner is on system reliability, currently working on adequate hardware and software architectures to bridge the gap between the manycore computing and embedded computing. He also published excessively on worst-case execution time analysis and served as PC chair of WDES’06 and WCET’08. Currently he is local coinvestigator of the FP7 project ADVANCE and local principal investigator of the Artemis-JU project CRAFTERS. Further, he has been the principal investigator of three research projects funded by the Austrian Science Foundation (COSTA, FORTAS, SECCO). He is a member of the IFIP Working Group 10.4 (Embedded Systems).

Note

This talk is organized by the Compilers and Languages Group at the Institute of Computer Languages. Tea at the library of E185/1, Argentinierstr. 8, 4th floor (central) at 16:30.

Speakers

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