Informatik, TU Wien

Evolutionary Circuit Design and Approximation

In this talk, I will survey the recent development in the area of evolutionary circuit design.

Abstract

In this talk, I will survey the recent development in the area of evolutionary circuit design. Several case studies will be presented to demonstrate strengths and weaknesses of the evolutionary design method. In particular, evolutionary design of combinational circuits will be discussed in which evolutionary computing is combined with formal methods (SAT solving, BDD). The second part of the talk will be devoted to approximate computing, which is a modern design paradigm for energy-efficient computer-based systems. The approximate circuit design problem can be formulated as a multi-objective optimization problem, in which the quality of processing and power consumption are conflicting design objectives. It will be shown how the principles of evolutionary circuit design can be utilized routinely to approximate digital circuits.
 

Biography

Prof. Lukas Sekanina received all his degrees (Ing. in 1999, Ph.D in 2002) from Brno University of Technology, Czech Republic. He was awarded with the Fulbright scholarship to work with NASA Jet Propulsion Laboratory at Caltech, Pasadena, CA in 2004. He was a visiting professor with CEI UPM Madrid (2012), visiting lecturer with Pennsylvania State University, PA (2001) and visiting researcher with Department of Informatics, University of Oslo (2001). He has served as a program committee member of evolutionary computation conferences (CEC, GECCO, EuroGP, ICES etc.) and circuit design conferences (DATE, FPL, AHS, DDECS etc.), associate editor of IEEE Transactions on Evolutionary Computation (2011-2014), associate editor/editorial board member of Genetic Programming and Evolvable Machines Journal and International Journal of Innovative Computing and Applications. He served as the general chair of DDECS 2013 and program co-chair of ICES 2008 and DTIS 2016 conferences. He (co)authored over 150 papers mainly on evolutionary circuit design and evolvable hardware and 1 patent. He is currently a full professor and Head of the Department of Computers Systems at Faculty of Information Technology, Brno University of Technology. He is also leading Research programme 8 (Secure and Safe Architectures, Networks and Protocols) of the Czech national supercomputing centre. Senior Member of IEEE. For more information, see here

Note

This talk is organized by the Embedded Computing Systems Group at the Institute of Computer Engineering.